bus: ti-sysc: Do rstctrl reset handling in two phases
We need to deassert rstctrl resets before enabling clocks to avoid clock "failed to enable" errors. For asserting rstctrl reset, the clocks need to be enabled. As the reset controller status is not available for arrays, let's use devm_reset_control_get_optional() so we can get the status after reset. Note that depends on a proper PRM rstctrl driver, so far I've only tested this with earlier reset-simple patches. Tested-by:Keerthy <j-keerthy@ti.com> Signed-off-by:
Tony Lindgren <tony@atomide.com>
parent
8383e259
Please register or sign in to comment