Skip to content
Commit e7eccc7e authored by Nicolin Chen's avatar Nicolin Chen Committed by Shawn Guo
Browse files

ARM: clk-imx6qdl: Add clko1 configuration for imx6qdl-sabresd



WM8962 needs 24MHz clock for its MCLK, so choose PLL4 as the parent of clko1.

Signed-off-by: default avatarNicolin Chen <b42378@freescale.com>
Signed-off-by: default avatarShawn Guo <shawn.guo@linaro.org>
parent 3250f59e
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment