scsi: ufs: ufs-exynos: Change pclk available max value

To support 167MHz PCLK, we need to adjust the maximum value.

Link: https://lore.kernel.org/r/20211018124216.153072-4-chanho61.park@samsung.com


Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>