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Commit d731b472 authored by Jonathan Bell's avatar Jonathan Bell Committed by Phil Elwell
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drivers: clk: rp1: add GPCLK source muxes and additional PLL dividers



General-purpose clocks are routed (via a pad) to a large variety of
peripheral aux muxes, and themselves gather a large variety of source
clocks. Entries without a corresponding name string should not be
selected - they bring out internal test/debug clocks which may be
intermittent or very high frequency.

As the GPCLK inputs to peripheral muxes come from a pad, differentiate
the source name from the divider output name. This allows the
possibility of specifying an off-chip clock source to drive the internal
peripheral clock.

Signed-off-by: default avatarJonathan Bell <jonathan@raspberrypi.com>
parent e9834ca4
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