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Commit cf938f91 authored by Seongsu Park's avatar Seongsu Park Committed by Catalin Marinas
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arm64: Cleanup __cpu_set_tcr_t0sz()



The T0SZ field of TCR_EL1 occupies bits 0-5 of the register and encode
the virtual address space translated by TTBR0_EL1. When updating the
field, for example because we are switching to/from the idmap page-table,
__cpu_set_tcr_t0sz() erroneously treats its 't0sz' argument as unshifted,
resulting in harmless but confusing double shifts by 0 in the code.

Co-developed-by: default avatarLeem ChaeHoon <infinite.run@gmail.com>
Signed-off-by: default avatarLeem ChaeHoon <infinite.run@gmail.com>
Signed-off-by: default avatarSeongsu Park <sgsu.park@samsung.com>
Link: https://lore.kernel.org/r/20240523122146.144483-1-sgsu.park@samsung.com


Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
parent 57361114
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