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Commit cec7e80f authored by Rohit Khaire's avatar Rohit Khaire Committed by Alex Deucher
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drm/amdgpu: Enable RLCG read/write interface for Sienna Cichlid 



Enable this only for Sienna Cichild
since only Navi12 and Sienna Cichlid support SRIOV

Signed-off-by: default avatarRohit Khaire <rohit.khaire@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 18703923
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