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Commit cc33ae43 authored by David Daney's avatar David Daney Committed by Ralf Baechle
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MIPS: Use BBIT instructions in TLB handlers



If the CPU supports BBIT0 and BBIT1, use them in TLB handlers as they
are more efficient than an AND followed by an branch and then
restoring the clobbered register.

Signed-off-by: default avatarDavid Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1873/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent afc7c986
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