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Commit cbe069f5 authored by Daniel Miess's avatar Daniel Miess Committed by Alex Deucher
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drm/amd/display: Port replay vblank logic to DML2



Update DML2 with replay vblank logic found in DML1.

Reviewed-by: default avatarCharlene Liu <charlene.liu@amd.com>
Acked-by: default avatarQingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: default avatarDaniel Miess <daniel.miess@amd.com>
Signed-off-by: default avatarQingqing Zhuo <Qingqing.Zhuo@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent ba85d293
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