Skip to content
Commit ca5b0b71 authored by Samuel Holland's avatar Samuel Holland Committed by Thomas Gleixner
Browse files

irqchip/riscv-intc: Fix use of AIA interrupts 32-63 on riscv32

riscv_intc_custom_base is initialized to BITS_PER_LONG, so the second
check passes even though AIA provides 64 interrupts. Adjust the condition to
only check the custom range for interrupts outside the standard range, and
adjust the standard range when AIA is available.

Fixes: 3c46fc5b ("irqchip/riscv-intc: Add support for RISC-V AIA")
Fixes: 678c607e

 ("irqchip/riscv-intc: Fix low-level interrupt handler setup for AIA")
Signed-off-by: default avatarSamuel Holland <samuel.holland@sifive.com>
Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Reviewed-by: default avatarAnup Patel <anup@brainfault.org>
Link: https://lore.kernel.org/r/20240312212813.2323841-1-samuel.holland@sifive.com
parent 4527e837
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment