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Commit c9e8e8d2 authored by Jiri Prchal's avatar Jiri Prchal Committed by Mark Brown
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ASoC: tlv320aic3x: extending registers cache 



Adds missing register default values to cache.

Signed-off-by: default avatarJiri Prchal <jiri.prchal@aksignal.cz>
Signed-off-by: default avatarMark Brown <broonie@opensource.wolfsonmicro.com>
parent 784a897e
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