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Commit c9224faa authored by Brad Volkin's avatar Brad Volkin Committed by Daniel Vetter
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drm/i915: Add some L3 registers to the parser whitelist 



Beignet needs these in order to program the L3 cache config for
OpenCL workloads, particularly when using SLM.

Signed-off-by: default avatarBrad Volkin <bradley.d.volkin@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent beff0d0f
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