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Commit c457ac02 authored by Manivannan Sadhasivam's avatar Manivannan Sadhasivam Committed by Lorenzo Pieralisi
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PCI: qcom-ep: Gate Master AXI clock to MHI bus during L1SS 

During L1SS, gate the Master clock supplied to the MHI bus to save power.

Link: https://lore.kernel.org/r/20220914075350.7992-7-manivannan.sadhasivam@linaro.org


Signed-off-by: default avatarManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: default avatarLorenzo Pieralisi <lpieralisi@kernel.org>
parent 6dbba2b5
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