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Commit bd63ace4 authored by Chew, Chiau Ee's avatar Chew, Chiau Ee Committed by Wolfram Sang
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i2c: designware: 10-bit addressing mode enabling if I2C_DYNAMIC_TAR_UPDATE is set



According to Designware I2C spec, if I2C_DYNAMIC_TAR_UPDATE is set to 1,
the 10-bit addressing mode is controlled by IC_10BITADDR_MASTER bit of
IC_TAR register instead of IC_CON register. The IC_10BITADDR_MASTER
in IC_CON register becomes read-only copy. Since I2C_DYNAMIC_TAR_UPDATE
value can't be detected from hardware register, so we will always set the
IC_10BITADDR_MASTER bit in both IC_CON and IC_TAR register whenever 10-bit
addresing mode is requested by user application.

Signed-off-by: default avatarChew, Chiau Ee <chiau.ee.chew@intel.com>
Reviewed-by: default avatarMika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: default avatarWolfram Sang <wsa@the-dreams.de>
parent 85b3a935
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