Skip to content
Commit b973cf32 authored by Huy Nguyen's avatar Huy Nguyen Committed by Saeed Mahameed
Browse files

net/mlx5e: TC: Reserved bit 31 of REG_C1 for IPsec offload



Currently ASAP features fully utilize all the bits of the CQE's flow tag
and ft_metadata field. The flow tag field cannot be used because the
flow table tagging in FTE does not allow partial write.

We agree to reserve bit 31 of CQE's ft_metadata for IPsec to avoid
ASAP CT from dropping IPsec offloaded packet

Here is the new bit layout of REG_C1. Tunnel option id is reduced to
11 bits:
< IPSEC MARKER (1) | ESW_TUN_ID(12) | ESW_TUN_OPTS(11) | ESW_ZONE_ID(8) >

Signed-off-by: default avatarHuy Nguyen <huyn@nvidia.com>
Signed-off-by: default avatarRaed Salem <raeds@nvidia.com>
Reviewed-by: default avatarPaul Blakey <paulb@nvidia.com>
Reviewed-by: default avatarRoi Dayan <roid@nvidia.com>
Signed-off-by: default avatarSaeed Mahameed <saeedm@nvidia.com>
Signed-off-by: default avatarPaul Blakey <paulb@nvidia.com>
parent ed2fe7ba
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment