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Commit b74cc639 authored by Sander Vanheule's avatar Sander Vanheule Committed by Thomas Bogendoerfer
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mips: Realtek RTL: select NO_EXCEPT_FILL



The CPUs in these SoCs support MIPS32 R2, and allow ebase relocation.
Even if the default exception base of 0x80000000 is used, the
MIPS_GENERIC load address of 0x80100000 leaves sufficient space to not
need an extra 0x400 bytes of padding.

Suggested-by: default avatarOlliver Schinagl <oliver@schinagl.nl>
Signed-off-by: default avatarSander Vanheule <sander@svanheule.net>
Signed-off-by: default avatarThomas Bogendoerfer <tsbogend@alpha.franken.de>
parent 4a24f6e0
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