ASoC: SOF: amd: Flush cache after ATU_BASE_ADDR_GRP register update
ACP_SRAM_PTE block has cache that needs to be flushed after every PTE updates. This patch updates ACPAXI2AXI_ATU_CTRL register to flush cache after updating PTE with stream physical address. Reviewed-by:Ranjani Sridharan <ranjani.sridharan@linux.intel.com> Signed-off-by:
Ajit Kumar Pandey <AjitKumar.Pandey@amd.com> Signed-off-by:
Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Link: https://lore.kernel.org/r/20220304205733.62233-5-pierre-louis.bossart@linux.intel.com Signed-off-by:
Mark Brown <broonie@kernel.org>
parent
9c2611b2
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