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Commit b4fed079 authored by Sukanto Ghosh's avatar Sukanto Ghosh Committed by Catalin Marinas
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arm64: mm: Fix operands of clz in __flush_dcache_all



The format of the lower 32-bits of the 64-bit operand to 'dc cisw' is
unchanged from ARMv7 architecture and the upper bits are RES0. This
implies that the 'way' field of the operand of 'dc cisw' occupies the
bit-positions [31 .. (32-A)]. Due to the use of 64-bit extended operands
to 'clz', the existing implementation of __flush_dcache_all is incorrectly
placing the 'way' field in the bit-positions [63 .. (64-A)].

Signed-off-by: default avatarSukanto Ghosh <sghosh@apm.com>
Tested-by: default avatarAnup Patel <anup.patel@linaro.org>
Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
Cc: stable@vger.kernel.org
parent c560ecfe
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