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Commit b3fddd5b authored by Peng Fan's avatar Peng Fan Committed by Stephen Boyd
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clk: imx: imx8mm: fix int pll clk gate

To Frac pll, the gate shift is 13, however to Int PLL the gate shift
is 11.

Cc: <stable@vger.kernel.org>
Fixes: ba5625c3

 ("clk: imx: Add clock driver support for imx8mm")
Signed-off-by: default avatarPeng Fan <peng.fan@nxp.com>
Reviewed-by: default avatarFabio Estevam <festevam@gmail.com>
Reviewed-by: default avatarJacky Bai <ping.bai@nxp.com>
Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent f7df8c92
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