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Commit b0f0daa8 authored by Priit Laes's avatar Priit Laes Committed by Maxime Ripard
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clk: sunxi-ng: sun5i: Fix mux width for csi clock 



Mux for CSI clock is 3 bits, not 2.

Signed-off-by: default avatarPriit Laes <plaes@plaes.org>
Signed-off-by: default avatarMaxime Ripard <maxime.ripard@free-electrons.com>
parent 05c04bef
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