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Commit aa9c0df9 authored by Prasad Malisetty's avatar Prasad Malisetty Committed by Bjorn Helgaas
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PCI: qcom: Switch pcie_1_pipe_clk_src after PHY init in SC7280



On the SC7280, the clock source for gcc_pcie_1_pipe_clk_src must be the
TCXO while gdsc is enabled. After PHY init successful clock source should
switch to pipe clock for gcc_pcie_1_pipe_clk_src.

Link: https://lore.kernel.org/r/1633628923-25047-6-git-send-email-pmaliset@codeaurora.org
Signed-off-by: default avatarPrasad Malisetty <pmaliset@codeaurora.org>
Signed-off-by: default avatarLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
Reviewed-by: default avatarStephen Boyd <swboyd@chromium.org>
parent b89ff410
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