drm/bridge: tfp410: add pclk limits

Add pixel clock limits to the driver as per TFP410 datasheet: min 25MHz,
max 165MHz.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200121094655.9092-1-tomi.valkeinen@ti.com