xtensa: make secondary reset vector support conditional

Whether xtensa cores start from primary or secondary reset vector is
configurable and may be chosen by board designer or controlled at
runtime. When secondary reset vector is unused its location in memory
may not be writable.
Make secondary reset vector support conditional and don't build and load
secondary reset vector code when it is disabled.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>