Skip to content
Commit 82b7487b authored by Mrinmay Sarkar's avatar Mrinmay Sarkar Committed by Vinod Koul
Browse files

phy: qcom-qmp-pcie: add x4 lane EP support for sa8775p



Add support for x4 lane end point mode PHY found on sa8755p platform.
Reusing existing serdes and pcs_misc table for EP and moved
BIAS_EN_CLKBUFLR_EN register from RC serdes table to common serdes
table as this register is part of both RC and EP.

Signed-off-by: default avatarMrinmay Sarkar <quic_msarkar@quicinc.com>
Reviewed-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/1714494089-7917-2-git-send-email-quic_msarkar@quicinc.com


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent 2ff6365e
Loading
Loading
Loading
Loading
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Please register or to comment