platform/x86/intel/pmc: Alder Lake PCH slp_s0_residency fix
[ Upstream commit fb575510 ] For platforms with Alder Lake PCH (Alder Lake S and Raptor Lake S) the slp_s0_residency attribute has been reporting the wrong value. Unlike other platforms, ADL PCH does not have a counter for the time that the SLP_S0 signal was asserted. Instead, firmware uses the aggregate of the Low Power Mode (LPM) substate counters as the S0ix value. Since the LPM counters run at a different frequency, this lead to misreporting of the S0ix time. Add a check for Alder Lake PCH and adjust the frequency accordingly when display slp_s0_residency. Fixes: bbab3110 ("platform/x86/intel: pmc/core: Add Alderlake support to pmc core driver") Signed-off-by:Rajvi Jingar <rajvi.jingar@linux.intel.com> Signed-off-by:
David E. Box <david.e.box@linux.intel.com> Reviewed-by:
Rajneesh Bhardwaj <irenic.rajneesh@gmail.com> Reviewed-by:
Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20230320212029.3154407-1-david.e.box@linux.intel.com Reviewed-by:
Hans de Goede <hdegoede@redhat.com> Signed-off-by:
Hans de Goede <hdegoede@redhat.com> Signed-off-by:
Sasha Levin <sashal@kernel.org>
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75084659
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