dt-bindings: cache: andestech,ax45mp-cache: Fix unit address in example

The unit address in the example does not match the reg property.
Correct the unit address to match reality.

Fixes: 3e7bf468 ("dt-bindings: cache: andestech,ax45mp-cache: Add DT binding documentation for L2 cache controller")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/7b93655219a6ad696dd3faa9f36fde6b094694a9.1696330005.git.geert+renesas@glider.be


Signed-off-by: Rob Herring <robh@kernel.org>