fixup! i2c: designware: Support non-standard bus speeds

[1] calculates timings for arbitrary clock speeds, but it does so aiming
for a 50% SCL duty cycle. This is the wrong goal, particularly for high
clock speeds, because it doesn't allow the device sufficient time to
pull the bus low to issue an ACK.

Change the algorithm to aim for the minimum SCL high time (tHIGH) for
the requested speed according to the I2C Specification, using linear
interpolation between the values for the standard speeds.

Signed-off-by: Phil Elwell <phil@raspberrypi.com>

[1] commit cea76e58 ("i2c: designware: Support non-standard bus speeds")