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Commit 699b477a authored by Thierry Reding's avatar Thierry Reding
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clk: tegra: Add peripheral registers for bank Y



Tegra210 has an extra bank of peripheral clock registers. Add it to the
generic peripheral clock code.

Cc: Peter De Schrijver <pdeschrijver@nvidia.com>
Cc: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: default avatarPaul Walmsley <paul@pwsan.com>
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent 5e43e259
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