Merge branches 'clk-remove', 'clk-amlogic', 'clk-qcom', 'clk-parent' and...

Merge branches 'clk-remove', 'clk-amlogic', 'clk-qcom', 'clk-parent' and 'clk-microchip' into clk-next

* clk-remove:
  clk: starfive: jh7110-vout: Convert to platform remove callback returning void
  clk: starfive: jh7110-isp: Convert to platform remove callback returning void
  clk: imx: imx8-acm: Convert to platform remove callback returning void

* clk-amlogic:
  clk: meson: Add missing clocks to axg_clk_regmaps

* clk-qcom: (62 commits)
  clk: qcom: gcc-ipq5018: fix register offset for GCC_UBI0_AXI_ARES reset
  clk: qcom: gcc-ipq5018: fix 'halt_reg' offset of 'gcc_pcie1_pipe_clk'
  clk: qcom: gcc-ipq5018: fix 'enable_reg' offset of 'gcc_gmac0_sys_clk'
  clk: qcom: camcc-x1e80100: Fix missing DT_IFACE enum in x1e80100 camcc
  clk: qcom: mmcc-msm8974: fix terminating of frequency table arrays
  clk: qcom: mmcc-apq8084: fix terminating of frequency table arrays
  clk: qcom: camcc-sc8280xp: fix terminating of frequency table arrays
  clk: qcom: gcc-ipq9574: fix terminating of frequency table arrays
  clk: qcom: gcc-ipq8074: fix terminating of frequency table arrays
  clk: qcom: gcc-ipq6018: fix terminating of frequency table arrays
  clk: qcom: gcc-ipq5018: fix terminating of frequency table arrays
  clk: qcom: dispcc-sdm845: Adjust internal GDSC wait times
  dt-bindings: clk: qcom: drop the SC7180 Modem subsystem clock controller
  clk: qcom: drop the SC7180 Modem subsystem clock driver
  clk: qcom: Use qcom_branch_set_clk_en()
  clk: qcom: branch: Add a helper for setting the enable bit
  clk: qcom: dispcc-sm8250: Make clk_init_data and pll_vco const
  clk: qcom: gcc-sc8180x: Add missing UFS QREF clocks
  clk: qcom: gcc-msm8953: add more resets
  clk: qcom: videocc-*: switch to module_platform_driver
  ...

* clk-parent:
  clk: Fix clk_core_get NULL dereference

* clk-microchip:
  clk: microchip: mpfs: convert MSSPLL outputs to clk_divider
  clk: microchip: mpfs: add missing MSSPLL outputs
  clk: microchip: mpfs: setup for using other mss pll outputs
  clk: microchip: mpfs: split MSSPLL in two
  dt-bindings: can: mpfs: add missing required clock
  dt-bindings: clock: mpfs: add more MSSPLL output definitions