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Unverified Commit 60bc84e2 authored by 谢致邦 (XIE Zhibang)'s avatar 谢致邦 (XIE Zhibang) Committed by Paul Burton
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MIPS: Loongson: Merge load addresses



Systems based upon the Loongson 1B & 1C CPUs share the same load
address, as do those based upon Loongson 1A. Unify the definition of
this load address to reduce duplication & avoid the need for an extra
Loongson 1A case in future.

[paul.burton@mips.com: Rewrite commit message.]

Signed-off-by: default avatar谢致邦 (XIE Zhibang) <Yeking@Red54.com>
Signed-off-by: default avatarPaul Burton <paul.burton@mips.com>
Patchwork: https://patchwork.linux-mips.org/patch/14927/
Cc: linux-mips@linux-mips.org
parent 968dc5a0
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