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Commit 5e2421ce authored by Tommy Haung's avatar Tommy Haung Committed by Joel Stanley
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drm/aspeed: Update INTR_STS handling 



Add interrupt clear register define for further chip support.

Signed-off-by: default avatarTommy Haung <tommy_huang@aspeedtech.com>
Reviewed-by: default avatarJoel Stanley <joel@jms.id.au>
Signed-off-by: default avatarJoel Stanley <joel@jms.id.au>
Link: https://patchwork.freedesktop.org/patch/msgid/20220302024930.18758-4-tommy_huang@aspeedtech.com
parent 9ae2ac4d
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