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Commit 5a5223ff authored by Manivannan Sadhasivam's avatar Manivannan Sadhasivam Committed by Stephen Boyd
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clk: qcom: Add A7 PLL support



Add support for PLL found in Qualcomm SDX55 platforms which is used to
provide clock to the Cortex A7 CPU via a mux. This PLL can provide high
frequency clock to the CPU above 1GHz as compared to the other sources
like GPLL0.

In this driver, the power domain is attached to the cpudev. This is
required for CPUFreq functionality and there seems to be no better place
to do other than this driver (no dedicated CPUFreq driver).

Signed-off-by: default avatarManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210118041156.50016-5-manivannan.sadhasivam@linaro.org


Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent ee778e06
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