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Commit 523b8b31 authored by Martin Blumenstingl's avatar Martin Blumenstingl Committed by Kevin Hilman
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ARM: dts: meson: add the TIMER B/C/D interrupts



The timer on Meson6/Meson8/Meson8b SoCs has four internal timer events.
For each of these a separate interrupt exists.
Pass these interrupts to allow using the timers other than TIMER A.

Signed-off-by: default avatarMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: default avatarKevin Hilman <khilman@baylibre.com>
parent 7e26335b
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