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Commit 49fdbd7c authored by Ley Foon Tan's avatar Ley Foon Tan Committed by Lorenzo Pieralisi
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PCI: altera: Add Stratix 10 PCIe support



Add PCIe Root Port support for Stratix 10 device.

Main differences compared to the PCIe Root Port IP on Cyclone V
and Arria 10 devices:

- HIP interface to access Root Port configuration register
- TLP programming flow:
  - One REG0 register
  - Don't need to check alignment

Signed-off-by: default avatarLey Foon Tan <ley.foon.tan@intel.com>
Signed-off-by: default avatarLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
parent bfeffd15
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