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Commit 47743669 authored by Zhou Wang's avatar Zhou Wang Committed by Will Deacon
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Revert "iommu/arm-smmu-v3: Decrease the queue size of evtq and priq"



The commit f115f3c0 ("iommu/arm-smmu-v3: Decrease the queue size of
evtq and priq") decreases evtq and priq, which may lead evtq/priq to be
full with fault events, e.g HiSilicon ZIP/SEC/HPRE have maximum 1024 queues
in one device, every queue could be binded with one process and trigger a
fault event. So let's revert f115f3c0.

In fact, if an implementation of SMMU really does not need so long evtq
and priq, value of IDR1_EVTQS and IDR1_PRIQS can be set to proper ones.

Signed-off-by: default avatarZhou Wang <wangzhou1@hisilicon.com>
Acked-by: default avatarZhen Lei <thunder.leizhen@huawei.com>
Link: https://lore.kernel.org/r/1638858768-9971-1-git-send-email-wangzhou1@hisilicon.com


Signed-off-by: default avatarWill Deacon <will@kernel.org>
parent a556cfe4
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