FPGA: Add TS-7300 FPGA manager
Add support for loading bitstreams on the Altera Cyclone II FPGA populated on the TS-7300 board. This is done through the configuration and data registers offered through a memory interface between the EP93xx SoC and the FPGA via an intermediate CPLD device. The EP93xx SoC on the TS-7300 does not have direct means of configuring the on-board FPGA other than by using the special memory mapped interface to the CPLD. No other entity on the system can control the FPGA bitstream. Signed-off-by:Florian Fainelli <f.fainelli@gmail.com> Acked-by:
Alan Tull <atull@opensource.altera.com> Acked-by:
Moritz Fischer <moritz.fischer@ettus.com> Signed-off-by:
Greg Kroah-Hartman <gregkh@linuxfoundation.org>
parent
161db575
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