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Commit 3521fa63 authored by Jarkko Nikula's avatar Jarkko Nikula Committed by Alexandre Belloni
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i3c: mipi-i3c-hci: Resume controller explicitly



On an HW I'm using in enabling work the RESUME bit is not set in the
HC_CONTROLLER register when Host Controller goes to halt state. Value 1
should mean controller is suspended when reading and writing 1 resumes it.

Because of this erratic behaviour plain HC_CONTROL read and write back
won't resume the controller. Therefore do it by setting the RESUME bit
explicitly.

Signed-off-by: default avatarJarkko Nikula <jarkko.nikula@linux.intel.com>
Link: https://lore.kernel.org/r/20230921055704.1087277-12-jarkko.nikula@linux.intel.com


Signed-off-by: default avatarAlexandre Belloni <alexandre.belloni@bootlin.com>
parent 4c36f656
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