ARM: DRA7: hwmod: Add data for eDMA tpcc, tptc0, tptc1
Add hwmod data for the eDMA blocks: - TPCC: Third-party channel controller - TPTC0: Third-party transfer controller 0 - TPTC1: Third-party transfer controller 1 The TPCC's clock gating status follows the status of its clock and power domain. This means that the hwmod code can not directly control the TPCC enable/disable status. Signed-off-by:Peter Ujfalusi <peter.ujfalusi@ti.com> [paul@pwsan.com: rephrased last two sentences of the patch description] Signed-off-by:
Paul Walmsley <paul@pwsan.com>
parent
1c96bee4
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