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Commit 2c8c53e2 authored by David Daney's avatar David Daney Committed by Ralf Baechle
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MIPS: Optimize TLB handlers for Octeon CPUs



Octeon can use scratch registers in the TLB handlers.  Octeon II can
use LDX instructions.

Signed-off-by: default avatarDavid Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1904/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent bb3d68c3
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