arm64/head: Drop unnecessary pre-disable-MMU workaround
The Falkor erratum that results in the need for an ISB before clearing the M bit in SCTLR_ELx only applies to execution at exception level x, and so the workaround is not needed when disabling the EL1 MMU while running at EL2. Signed-off-by:Ard Biesheuvel <ardb@kernel.org> Acked-by:
Marc Zyngier <maz@kernel.org> Acked-by:
Mark Rutland <mark.rutland@arm.com> Link: https://lore.kernel.org/r/20240415075412.2347624-5-ardb+git@google.com Signed-off-by:
Catalin Marinas <catalin.marinas@arm.com>
parent
015a12a4
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