drm/nv50: use "nv86" tlb flush method on everything except 0x50/0xac

It has been reported that this greatly improves (and possibly fixes
completely) the stability of NVA3+ chipsets.  In traces of my NVA8,
NVIDIA now appear to be doing this too.

The most recent traces of 0x50 and 0xac I could find don't show NVIDIA
checking PGRAPH status on these flushes, so for now, we won't either.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>