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Commit 1ddfecaf authored by Min Li's avatar Min Li Committed by David S. Miller
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ptp: add FemtoClock3 Wireless as ptp hardware clock



The RENESAS FemtoClock3 Wireless is a high-performance jitter attenuator,
frequency translator, and clock synthesizer. The device is comprised of 3
digital PLLs (DPLL) to track CLKIN inputs and three independent low phase
noise fractional output dividers (FOD) that output low phase noise clocks.

FemtoClock3 supports one Time Synchronization (Time Sync) channel to enable
an external processor to control the phase and frequency of the Time Sync
channel and to take phase measurements using the TDC. Intended applications
are synchronization using the precision time protocol (PTP) and
synchronization with 0.5 Hz and 1 Hz signals from GNSS.

Signed-off-by: default avatarMin Li <min.li.xe@renesas.com>
Acked-by: default avatarLee Jones <lee@kernel.org>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent ea1cc3ee
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