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Commit 166869b3 authored by Madhav Chauhan's avatar Madhav Chauhan Committed by Jani Nikula
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drm/i915/icl: Define PORT_CL_DW_10 register



This register used to power down individual lanes for
DDI/DSI ports. Bitfields to power up/down various
combinations of lanes are also added in this patch.

v2: Review comments from Jani N
    - Use override instead of "override" for bitfields
    - Define mask for override bitfield
    - Define PWR_DOWN_LN* macros shifted in place
v3: Correct PWR_DOWN_LN_MASK value (Jani N)

Signed-off-by: default avatarMadhav Chauhan <madhav.chauhan@intel.com>
Reviewed-by: default avatarJani Nikula <jani.nikula@intel.com>
Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1530798591-2077-6-git-send-email-madhav.chauhan@intel.com
parent b1cb21a5
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