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Unverified Commit 13a45b94 authored by YC Hung's avatar YC Hung Committed by Mark Brown
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ASoC: SOF: mediatek: Revise mt8195 boot flow



1. Revise hifixdsp shutdown flow to pull runstall high then reset high.
2. Add 1 us delay between D/BRESET high and low for 10 DSP cycles(26M)
   based on IP vendor's suggestion.

Signed-off-by: default avatarYC Hung <yc.hung@mediatek.com>
Signed-off-by: default avatarPierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Reviewed-by: default avatarLi-Yu Yu <afg984@gmail.com>
Reviewed-by: default avatarRanjani Sridharan <ranjani.sridharan@linux.intel.com>
Reviewed-by: default avatarKuanHsun Cheng <Allen-KH.Cheng@mediatek.com>
Reviewed-by: default avatarPéter Ujfalusi <peter.ujfalusi@linux.intel.com>
Link: https://lore.kernel.org/r/20220708203904.29214-2-pierre-louis.bossart@linux.intel.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 7d596d9b
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