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Commit 0f77ce26 authored by Patrice Chotard's avatar Patrice Chotard Committed by Arnd Bergmann
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Revert "ARM: sti: Implement dummy L2 cache's write_sec"

This reverts commit 7b8e0188.

Initially, STiH410-B2260 was supposed to be secured, that's why
l2c_write_sec was stubbed to avoid secure register access from
non secure world.

But by default, STiH410-B2260 is running in non secure mode,
so L2 cache register accesses are authorized, l2c_write_sec stub
is not needed.

With this patch, L2 cache is configured and performance are enhanced.

Link: https://lore.kernel.org/r/20200618172456.29475-1-patrice.chotard@st.com


Signed-off-by: default avatarPatrice Chotard <patrice.chotard@st.com>
Cc: Alain Volmat <alain.volmat@st.com>
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parent 4c9f47ce
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