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Commit 0f5cb0e6 authored by Ronald Wahl's avatar Ronald Wahl Committed by Stephen Boyd
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clk: at91: Fix division by zero in PLL recalc_rate()



Commit a982e45d ("clk: at91: PLL recalc_rate() now using cached MUL
and DIV values") removed a check that prevents a division by zero. This
now causes a stacktrace when booting the kernel on a at91 platform if
the PLL DIV register contains zero. This commit reintroduces this check.

Fixes: a982e45d ("clk: at91: PLL recalc_rate() now using cached...")
Cc: <stable@vger.kernel.org>
Signed-off-by: default avatarRonald Wahl <rwahl@gmx.de>
Acked-by: default avatarLudovic Desroches <ludovic.desroches@microchip.com>
Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent 5b394b2d
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