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Commit 9ae9ab1c authored by ShihPo Hung's avatar ShihPo Hung Committed by Tom Stellard
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[RISCV][MC] Fix nf encoding for vector ld/st whole register 

The three bit nf is one less than the number of NFIELDS,
so we manually decrement 1 for VS1/2/4/8R & VL1/2/4/8R.

Differential revision: https://reviews.llvm.org/D98185

(cherry picked from commit rG5cdb2e98608bf57c216ee7067e8a12d070c9e2bd)
parent ff2cf8fa
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