arm_gicv3: Fix broken logic in ELRSR calculation
Fix a broken expression in the calculation of ELRSR register bits: instead of "(lr & ICH_LR_EL2_HW) == 1" we want to check for != 0, because the HW bit is not bit 0 so a test for == 1 is always false. Fixes: https://bugs.launchpad.net/bugs/1658506 Signed-off-by:Peter Maydell <peter.maydell@linaro.org> Reviewed-by:
Thomas Huth <thuth@redhat.com> Message-id: 1485255993-6322-1-git-send-email-peter.maydell@linaro.org
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