- Sep 19, 2007
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Sebastian Siewior authored
According to the comment in spufs_init_isolated_loader(), the isolated loader should be aligned on a 16 byte boundary. ARCH_{KMALLOC,SLAB}_MINALIGN is not defined so only 8 byte alignment is guaranteed. This enforces alignment via __get_free_pages. Signed-off-by:
Sebastian Siewior <sebastian@breakpoint.cc> Signed-off-by:
Jeremy Kerr <jk@ozlabs.org> Signed-off-by:
Paul Mackerras <paulus@samba.org>
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Jeremy Kerr authored
Based on an initial patch from Sebastian Siewior <sebastian@breakpoint.cc> spu_harvest isn't used, remove it. Signed-off-by:
Jeremy Kerr <jk@ozlabs.org> Signed-off-by:
Paul Mackerras <paulus@samba.org>
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Jeremy Kerr authored
do_spu_create doesn't need the asmlinkage qualifier; remove it. Signed-off-by:
Jeremy Kerr <jk@ozlabs.org> Signed-off-by:
Paul Mackerras <paulus@samba.org>
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Sebastian Siewior authored
There are a few symbols used only in one file within spufs; this change makes them static where suitable. Signed-off-by:
Sebastian Siewior <sebastian@breakpoint.cc> Signed-off-by:
Jeremy Kerr <jk@ozlabs.org> Signed-off-by:
Paul Mackerras <paulus@samba.org>
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Olaf Hering authored
drivers/serial/pmac_zilog.c:1590: warning: format '%d' expects type 'int', but argument 3 has type 'pm_message_t' Signed-off-by:
Olaf Hering <olaf@aepfle.de> Signed-off-by:
Paul Mackerras <paulus@samba.org>
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Michael Neuling authored
After talking to an IBM POWER hypervisor (PHYP) design and development guy, there seems to be no need for memory barriers when updating the SLB shadow buffer provided we only update it from the current CPU, which we do. Also, these guys see no need in the future for these barriers. Signed-off-by:
Michael Neuling <mikey@neuling.org> Signed-off-by:
Paul Mackerras <paulus@samba.org>
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Jesper Juhl authored
kmalloc() returns a void pointer so there is absolutely no need to cast it in ibmebus_chomp(). Signed-off-by:
Jesper Juhl <jesper.juhl@gmail.com> Signed-off-by:
Paul Mackerras <paulus@samba.org>
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- Sep 17, 2007
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Adrian Bunk authored
Current status of APUS: - arch/powerpc/: removed in 2.6.23 - arch/ppc/: marked BROKEN since 2 years This therefore removes the remaining parts of APUS support from arch/ppc, include/asm-ppc, arch/powerpc and include/asm-powerpc. Signed-off-by:
Adrian Bunk <bunk@stusta.de> Signed-off-by:
Paul Mackerras <paulus@samba.org>
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- Sep 14, 2007
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Anton Vorontsov authored
Enabled using SPI controller on the MPC832x RDB board. We currently use a modalias of "spidev" as a place holder (replace with "mmc_spie") until the mmc_spi driver support is merged in. This gets us the ability to test SPI until then. Signed-off-by:
Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Anton Vorontsov authored
Add helper function to setup SPI bus/device information Signed-off-by:
Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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John Rigby authored
Use idx as index into mpc52xx_uart_nodes instead of i Signed-off-by:
John Rigby <jrigby@freescale.com> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Timur Tabi authored
The current definition of struct ccsr_guts in immap_86xx.h was for 85xx. This patch fixes that and replaces the vague integer types with sized types of the correct endianness. The unused struct ccsr_pci is also deleted. Signed-off-by:
Timur Tabi <timur@freescale.com> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Timur Tabi authored
This patch adds the clrsetbits_xxx() macros, which are used to set and clear multiple bits in a single read-modify-write operation. Specify the bits to clear in the 'clear' parameter and the bits to set in the 'set' parameter. These macros can also be used to set a multiple-bit bit pattern using a mask, by specifying the mask in the 'clear' parameter and the new bit pattern in the 'set' parameter. There are big-endian and little-endian versions for 8, 16, 32, and 64 bits. Signed-off-by:
Timur Tabi <timur@freescale.com> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Anton Vorontsov authored
This is needed to configure and control QE pario pins from the kernel. Signed-off-by:
Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Scott Wood authored
These I/O accessors will be used in code under drivers/, which is expected to still work in arch/ppc. Signed-off-by:
Scott Wood <scottwood@freescale.com> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Kumar Gala authored
We get warnings like the following from the various ppc32 head*.S files: WARNING: vmlinux.o(.text+0x358): Section mismatch: reference to .init.text:early_init (between 'skpinv' and 'interrupt_base') WARNING: vmlinux.o(.text+0x380): Section mismatch: reference to .init.text:machine_init (between 'skpinv' and 'interrupt_base') WARNING: vmlinux.o(.text+0x384): Section mismatch: reference to .init.text:MMU_init (between 'skpinv' and 'interrupt_base') WARNING: vmlinux.o(.text+0x3aa): Section mismatch: reference to .init.text:start_kernel (between 'skpinv' and 'interrupt_base') WARNING: vmlinux.o(.text+0x3ae): Section mismatch: reference to .init.text:start_kernel (between 'skpinv' and 'interrupt_base') Added a .text.head section simliar to what other architectures do since modpost already excludes this from its warnings. Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Kumar Gala authored
Make it so that SPE support can be determined at runtime. This is similiar to how we handle AltiVec. This allows us to have SPE support built in and work on processors with and without SPE. Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Kumar Gala authored
Now that the generic code doesn't assign resources for Freescale PHBs we dont have to explicitly exclude it. Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Kumar Gala authored
Updated the device trees to have the PCI nodes be at the same level as the SOC node. This is to make it so that the SOC nodes children address space is just on chip registers and not other bus memory as well. Also, for PCIe nodes added a P2P bridge to handle the virtual P2P bridge that exists in the PHB. Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Kumar Gala authored
Removed the following cruft from .dts files: * 32-bit in cpu node -- doesn't exist in any spec and not used by kernel * removed built-in (chrp legacy) * Removed #interrupt-cells in places they don't need to be set * Fixed ranges on lite5200* * Removed clock-frequency from i8259 pic node, not sure where this came from * Removed big-endian from i8259 pic nodes, this was just bogus Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Kumar Gala authored
Added basic board port for MPC8572 DS reference platform that is similiar to the MPC8544/33 DS reference platform in uniprocessor mode. Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Kumar Gala authored
This adds code to handle alignment traps generated by the following SPE (signal processing engine) load/store instructions, by emulating the instruction in the kernel (as is done for other instructions that generate alignment traps): evldd[x] Vector Load Double Word into Double Word [Indexed] evldw[x] Vector Load Double into Two Words [Indexed] evldh[x] Vector Load Double into Four Half Words [Indexed] evlhhesplat[x] Vector Load Half Word into Half Words Even and Splat [Indexed] evlhhousplat[x] Vector Load Half Word into Half Word Odd Unsigned and Splat [Indexed] evlhhossplat[x] Vector Load Half Word into Half Word Odd Signed and Splat [Indexed] evlwhe[x] Vector Load Word into Two Half Words Even [Indexed] evlwhou[x] Vector Load Word into Two Half Words Odd Unsigned (zero-extended) [Indexed] evlwhos[x] Vector Load Word into Two Half Words Odd Signed (with sign extension) [Indexed] evlwwsplat[x] Vector Load Word into Word and Splat [Indexed] evlwhsplat[x] Vector Load Word into Two Half Words and Splat [Indexed] evstdd[x] Vector Store Double of Double [Indexed] evstdw[x] Vector Store Double of Two Words [Indexed] evstdh[x] Vector Store Double of Four Half Words [Indexed] evstwhe[x] Vector Store Word of Two Half Words from Even [Indexed] evstwho[x] Vector Store Word of Two Half Words from Odd [Indexed] evstwwe[x] Vector Store Word of Word from Even [Indexed] evstwwo[x] Vector Store Word of Word from Odd [Indexed] Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Scott Wood authored
1. Update the way get_brgfreq() finds things in the device tree. It now uses names that are less namespace polluting. The old names are supported until all boards are converted. 2. "size" is changed from unsigned int to int, to match what of_get_property() expects. Signed-off-by:
Scott Wood <scottwood@freescale.com> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Jon Loeliger authored
Signed-off-by:
Jon Loeliger <jdl@freescale.com> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Jon Loeliger authored
Signed-off-by:
Jon Loeliger <jdl@freescale.com> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Guennadi Liakhovetski authored
1. Fix RTC type - it is a rs5c372a, not rs5c372b 2. Configure both UART interrupts edge-triggered 3. Add a license header to ls_uart.c 4. Check for running on linkstation in a late_initcall() function. Needed for multiplatform builds, even though linkstation doesn't support them yet 5. Remove unneeded #include from linkstation.c Signed-off-by:
Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Kumar Gala authored
Renamed functions in 85xx_ds from 8544 to 85xx. Kept an unique machine def/probe for the MPC8544 DS board to handle some subtle differences between the future board based on the DS platform. Also fixed building w/o CONFIG_PCI and minor whitespace fixes. Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Kumar Gala authored
Renamed the mpc8544_ds.c board code to mpc85xx_ds.c to make it more generic in prep for other boards based on the same platform. Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Kumar Gala authored
The ucc_geth_mii code is based on the gianfar_mii code that use to include ocp.h. ucc never need this and it causes issues when we want to kill arch/ppc includes from arch/powerpc. Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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- Sep 13, 2007
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Geoff Levand authored
Add some more info to the PS3 storage probe debug output. Signed-off-by:
Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by:
Paul Mackerras <paulus@samba.org>
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Geert Uytterhoeven authored
Add new error codes that may be returned by the LV1 hypervisor Signed-off-by:
Geert Uytterhoeven <Geert.Uytterhoeven@sonycom.com> Signed-off-by:
Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by:
Paul Mackerras <paulus@samba.org>
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Jeremy Kerr authored
Currently, the ps3 kernel fails to build without smp but with kexec, as ps3_kexec_cpu_down needs ps3_smp_cleanup_cpu, which isn't defined on UP kernels. This change adds an empty ps3_smp_cleanup_cpu for UP kernels. Booted on ps3. Signed-off-by:
Jeremy Kerr <jk@ozlabs.org> Signed-off-by:
Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by:
Paul Mackerras <paulus@samba.org>
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Olof Johansson authored
Some versions of PWRficient 1682M have an interrupt controller in which the first register in each pair for interrupt sources doesn't always read with the right polarity/sense values. To work around this, keep a software copy of the register instead. Since it's not modified from the mpic itself, it's a feasible solution. Still, keep it under a config option to avoid wasting memory on other platforms. Signed-off-by:
Olof Johansson <olof@lixom.net> Signed-off-by:
Paul Mackerras <paulus@samba.org>
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David Gibson authored
This replaces the binding for flash chips in booting-without-of.txt with an clarified and improved version. It also makes drivers/mtd/maps/physmap_of.c recognize this new binding. Finally it revises the Ebony device tree source to use the new binding as an example. Signed-off-by:
David Gibson <david@gibson.dropbear.id.au> Acked-by:
Segher Boessenkool <segher@kernel.crashing.org> Signed-off-by:
Paul Mackerras <paulus@samba.org>
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Linas Vepstas authored
Grammatical corrections to comments. Signed-off-by:
Linas Vepstas <linas@austin.ibm.com> Signed-off-by:
Paul Mackerras <paulus@samba.org>
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Linas Vepstas authored
Whitespace cleanup: badly indented lines. Signed-off-by:
Linas Vepstas <linas@austin.ibm.com> Signed-off-by:
Paul Mackerras <paulus@samba.org>
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Linas Vepstas authored
Whitespace cleanup: badly indented lines. Typo in comment. Signed-off-by:
Linas Vepstas <linas@austin.ibm.com> Signed-off-by:
Paul Mackerras <paulus@samba.org>
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Scott Wood authored
Previously, the TLB miss handlers assumed that pages above KERNELBASE are always present and read/write. This assumption is false in the case of CONFIG_DEBUG_PAGEALLOC. Signed-off-by:
Scott Wood <scottwood@freescale.com> Signed-off-by:
Paul Mackerras <paulus@samba.org>
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Scott Wood authored
Some firmwares (such as PlanetCore) only provide a base MAC address, and expect the kernel to set certain bits to generate the addresses for the other ports. As such, MAC addresses are generated that may not correspond to actual hardware. Signed-off-by:
Scott Wood <scottwood@freescale.com> Acked-by:
David Gibson <david@gibson.dropbear.id.au> Signed-off-by:
Paul Mackerras <paulus@samba.org>
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Scott Wood authored
This will be used by the PlanetCore firmware support to construct a linux,stdout-path from the serial node that it finds. Signed-off-by:
Scott Wood <scottwood@freescale.com> Acked-by:
David Gibson <david@gibson.dropbear.id.au> Signed-off-by:
Paul Mackerras <paulus@samba.org>
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