PCI/DOE: Relax restrictions on request and response size
An upcoming user of DOE is CMA (Component Measurement and Authentication, PCIe r6.0 sec 6.31). It builds on SPDM (Security Protocol and Data Model): https://www.dmtf.org/dsp/DSP0274 SPDM message sizes are not always a multiple of dwords. To transport them over DOE without using bounce buffers, allow sending requests and receiving responses whose final dword is only partially populated. To be clear, PCIe r6.0 sec 6.30.1 specifies the Data Object Header 2 "Length" in dwords and pci_doe_send_req() and pci_doe_recv_resp() read/write dwords. So from a spec point of view, DOE is still specified in dwords and allowing non-dword request/response buffers is merely for the convenience of callers. Tested-by:Ira Weiny <ira.weiny@intel.com> Signed-off-by:
Lukas Wunner <lukas@wunner.de> Reviewed-by:
Ming Li <ming4.li@intel.com> Reviewed-by:
Jonathan Cameron <Jonathan.Cameron@huawei.com> Acked-by:
Bjorn Helgaas <bhelgaas@google.com> Link: https://lore.kernel.org/r/151b1a6a1794afb65d941287ecbc032c5b8004b9.1678543498.git.lukas@wunner.de Signed-off-by:
Dan Williams <dan.j.williams@intel.com>
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