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  1. Jun 19, 2021
  2. Jun 18, 2021
    • Matt Roper's avatar
      drm/i915: Add support for explicit L3BANK steering · 31939274
      Matt Roper authored
      
      
      Because Render Power Gating restricts us to just a single subslice as a
      valid steering target for reads of multicast registers in a SUBSLICE
      range, the default steering we setup at init may not lead to a suitable
      target for L3BANK multicast register.  In cases where it does not, use
      explicit runtime steering whenever an L3BANK multicast register is read.
      
      While we're at it, let's simplify the function a little bit and drop its
      support for gen10/CNL since no such platforms ever materialized for real
      use.  Multicast register steering is already an area that causes enough
      confusion; no need to complicate it with what's effectively dead code.
      
      v2:
       - Use gt->uncore instead of gt->i915->uncore.  (Tvrtko)
       - Use {} as table terminator.  (Rodrigo)
      
      v3:
       - L3bank fuse register is a disable mask rather than an enable mask.
         We need to invert it before use.  (CI)
      
      v4:
       - L3bank ID goes in the subslice field, not the slice field.  (CI)
      
      Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
      Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
      Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
      Reviewed-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20210617211425.1943662-4-matthew.d.roper@intel.com
      31939274
    • Matt Roper's avatar
      drm/i915: Add GT support for multiple types of multicast steering · 0957e931
      Matt Roper authored
      
      
      Although most of our multicast registers are replicated per-subslice, we
      also have a small number of multicast registers that are replicated
      per-l3 bank instead.  For both types of multicast registers we need to
      make sure we steer reads of these registers to a valid instance.
      Ideally we'd like to find a specific instance ID that would steer reads
      of either type of multicast register to a valid instance (i.e., not
      fused off and not powered down), but sometimes the combination of
      part-specific fusing and the additional restrictions imposed by Render
      Power Gating make it impossible to find any overlap between the set of
      valid subslices and valid l3 banks.  This problem will become even more
      noticeable on our upcoming platforms since they will be adding
      additional types of multicast registers with new types of replication
      and rules for finding valid instances for reads.
      
      To handle this we'll continue to pick a suitable subslice instance at
      driver startup and program this as the default (sliceid,subsliceid)
      setting in the steering control register (0xFDC).  In cases where we
      need to read another type of multicast GT register, but the default
      subslice steering would not correspond to a valid instance, we'll
      explicitly re-steer the single read to a valid value, perform the read,
      and then reset the steering to it's "subslice" default.
      
      This patch adds the general functionality to prepare for this explicit
      steering of other multicast register types.  We'll plug L3 bank steering
      into this in the next patch, and then add additional types of multicast
      registers when the support for our next upcoming platform arrives.
      
      v2:
       - Use entry->end==0 as table terminator.  (Rodrigo)
       - Grab forcewake in wa_list_verify() now that we're using accessors
         that assume forcewake is already held.
      
      v3:
       - Fix loop condition when iterating over steering range tables.
         (Rodrigo)
      
      Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
      Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
      Reviewed-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20210617211425.1943662-3-matthew.d.roper@intel.com
      0957e931
    • Daniele Ceraolo Spurio's avatar
      drm/i915: extract steered reg access to common function · 932641f0
      Daniele Ceraolo Spurio authored
      
      
      New steering cases will be added in the follow-up patches, so prepare a
      common helper to avoid code duplication.
      
      Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
      Signed-off-by: default avatarDaniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
      Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
      Reviewed-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20210617211425.1943662-2-matthew.d.roper@intel.com
      932641f0
    • Wan Jiabing's avatar
      drm/i915: Remove duplicate include of intel_region_lmem.h · 6796c772
      Wan Jiabing authored
      
      
      Fix the following checkinclude.pl warning:
      drivers/gpu/drm/i915/gt/intel_region_lmem.c
      8	#include "intel_region_lmem.h"
           12	#include "intel_region_lmem.h"
      
      Signed-off-by: default avatarWan Jiabing <wanjiabing@vivo.com>
      Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
      Link: https://patchwork.freedesktop.org/patch/msgid/20210615113522.6867-1-wanjiabing@vivo.com
      6796c772
  3. Jun 17, 2021
  4. Jun 16, 2021
  5. Jun 14, 2021
    • Thomas Hellström's avatar
      drm/i915: Simplify userptr locking · b4b9731b
      Thomas Hellström authored
      
      
      Use an rwlock instead of spinlock for the global notifier lock
      to reduce risk of contention in execbuf.
      
      Protect object state with the object lock whenever possible rather
      than with the global notifier lock
      
      Don't take an explicit page_ref in userptr_submit_init() but rather
      call get_pages() after obtaining the page list so that
      get_pages() holds the page_ref. This means we don't need to call
      userptr_submit_fini(), which is needed to avoid awkward locking
      in our upcoming VM_BIND code.
      
      Signed-off-by: default avatarThomas Hellström <thomas.hellstrom@linux.intel.com>
      Reviewed-by: default avatarMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
      Signed-off-by: default avatarMatthew Auld <matthew.auld@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20210610143525.624677-1-thomas.hellstrom@linux.intel.com
      b4b9731b
    • Chris Wilson's avatar
      drm/i915/selftests: Reorder tasklet_disable vs local_bh_disable · 35c6367f
      Chris Wilson authored
      Due to a change in requirements that disallows tasklet_disable() being
      called from atomic context, rearrange the selftest to avoid doing so.
      
      <3> [324.942939] BUG: sleeping function called from invalid context at kernel/softirq.c:888
      <3> [324.942952] in_atomic(): 1, irqs_disabled(): 0, non_block: 0, pid: 5601, name: i915_selftest
      <4> [324.942960] 1 lock held by i915_selftest/5601:
      <4> [324.942963]  #0: ffff888101d19240 (&dev->mutex){....}-{3:3}, at: device_driver_attach+0x18/0x50
      <3> [324.942987] Preemption disabled at:
      <3> [324.942990] [<ffffffffa026fbd2>] live_hold_reset.part.65+0xc2/0x2f0 [i915]
      <4> [324.943255] CPU: 0 PID: 5601 Comm: i915_selftest Tainted: G     U            5.13.0-rc5-CI-CI_DRM_10197+ #1
      <4> [324.943259] Hardware name: Intel Corp. Geminilake/GLK RVP2 LP4SD (07), BIOS GELKRVPA.X64.0062.B30.1708222146 08/22/2017
      <4> [324.943263] Call Trace:
      <4> [324.943267]  dump_stack+0x7f/0xad
      <4> [324.943276]  ___might_sleep.cold.123+0xf2/0x106
      <4> [324.943286]  tasklet_unlock_wait+0x2e/0xb0
      <4> [324.943291]  ? ktime_get_raw+0x81/0x120
      <4> [324.943305]  live_hold_reset.part.65+0x1ab/0x2f0 [i915]
      <4> [324.943500]  __i915_subtests.cold.7+0x42/0x92 [i915]
      <4> [324.943723]  ? __i915_live_teardown+0x50/0x50 [i915]
      <4> [324.943922]  ? __intel_gt_live_setup+0x30/0x30 [i915]
      
      Fixes: da044747
      
       ("tasklets: Replace spin wait in tasklet_unlock_wait()")
      Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
      Reviewed-by: default avatarThomas Hellström <thomas.hellstrom@linux.intel.com>
      Signed-off-by: default avatarMatthew Auld <matthew.auld@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20210611060838.647973-1-thomas.hellstrom@linux.intel.com
      35c6367f
    • Joonas Lahtinen's avatar
      Merge tag 'topic/i915-ttm-2021-06-11' of... · 0e9d217b
      Joonas Lahtinen authored
      
      Merge tag 'topic/i915-ttm-2021-06-11' of git://anongit.freedesktop.org/drm/drm-misc into drm-intel-gt-next
      
      drm-misc and drm-intel pull request for topic/i915-ttm:
      - Convert i915 lmem handling to ttm.
      - Add a patch to temporarily add a driver_private member to vma_node.
      - Use this to allow mixed object mmap handling for i915.
      
      Signed-off-by: default avatarJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
      From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/eb71ee2d-3413-6ca8-0b7c-a58695f00b77@linux.intel.com
      0e9d217b
    • Tvrtko Ursulin's avatar
      drm/i915: Fix busy ioctl commentary · c649432e
      Tvrtko Ursulin authored
      
      
      Just tidy one instance of incorrect context parameter name and a stray
      sentence ending from before reporting was converted to be class based.
      
      Signed-off-by: default avatarTvrtko Ursulin <tvrtko.ursulin@intel.com>
      Reviewed-by: default avatarMatthew Auld <matthew.auld@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20210611132221.1055650-1-tvrtko.ursulin@linux.intel.com
      c649432e
  6. Jun 11, 2021